1. Field of the Invention
The present invention relates to an active resistance-capacitor (RC) integrator and a continuous-time sigma-delta modulator and, more particularly, to an active RC integrator and a continuous-time sigma-delta modulator, both of which have a gain control function.
2. Discussion of Related Art
In audio signal processing systems or wireless communication systems, an analog signal processing circuit has a signal gain control function and an analog-to-digital conversion function.
In general, the gain control function is realized by a variable gain amplifier (VGA) or a programmable gain amplifier (PGA), and the analog-to-digital function is realized by an analog-to-digital converter (ADC).
For example, the ADC may be a Nyquist ADC or a sigma-delta ADC using an oversampling technique. In recent years, with the advancement of integrated circuit (IC) processes, circuits can now operate at a high speed, and thus sigma-delta ADCs have shown a tendency toward broader applications.
In order to reduce the power consumption of an analog signal processing system, research has been conducted on techniques for integrating a gain control function and an analog-to-digital conversion function into a single circuit. As a result, techniques related to a sigma-delta modulator (or the analog block of a sigma-delta ADC) having a gain control function have been announced.
Hereinafter, the structure and gain control function of a conventional sigma-delta modulator will be described with reference to FIGS. 1 and 2.
FIG. 1 is a circuit diagram illustrating a conventional discrete-time sigma-delta modulator having a gain control function.
As illustrated, the conventional discrete-time sigma-delta modulator uses a method of storing and transmitting signals as charges in and to a capacitor using a switched-capacitor technique. Specifically, the conventional discrete-time sigma-delta modulator stores an input signal and a DAC signal, which is a feedback signal, as charges in the capacitor in the sampling phase of a clock, and transmits the sampled charges to an integral capacitor in an integral phase. The conventional discrete-time sigma-delta modulator may be embodied by an integrator and a DAC.
The discrete-time sigma-delta modulator having this structure can vary reference voltages REFT and REFB to control a gain. However, this structure can be applied to only the discrete-time sigma-delta modulator, and it cannot be applied to the continuous-time sigma-delta modulator.
FIG. 2 is a circuit diagram illustrating a conventional continuous-time sigma-delta modulator, and particularly, a continuous-time sigma-delta modulator having a secondary structure.
As illustrated, the conventional continuous-time sigma-delta modulator may include a loop filter using an active RC integrator, a quantizer, and DACs IDAC1 and IDAC2.
The first integrator includes input resistors RIN, capacitors C1, and an operational amplifier (OP-AMP) OPA1, and the second integrator includes resistors R2, capacitors C2, and an OP-AMP OPA2. These first and second integrators constitute the loop filter.
An output of the loop filter is converted into a digital output by the quantizer, and the digital output is fed back to the loop filter through the DACs IDAC1 and IDAC2. That is, the DACs IDAC1 and IDAC2, the OP-AMP OPA1, the capacitors C1, the resistors R2, the OP-AMP OPA2, and the capacitors C2 constitute a negative feedback loop (hereinafter, referred to as “sigma-delta modulator loop”).
The continuous-time sigma-delta modulator having the above-described structure operates without a process of sampling an input signal, while the DACs transmit analog current signals to the first and second integrators in response to clock signals. Quantization noise of the quantizer is noise-shaped by the sigma-delta modulator loop so as to be reduced in the signal band, and the input signal passes through the input resistors RIN and the sigma-delta modulator loop, and is output without attenuation in the signal band.
Thus, compared to the discrete-time sigma-delta modulator, the continuous-time sigma-delta modulator has flexible design requirements of the amplifier, and thus can be operated with low power at a high speed.
However, the gain control function of the discrete-time sigma-delta modulator of FIG. 1 cannot be applied to the continuous-time sigma-delta modulator due to a structural difference. Further, when the DACs IDAC1 and IDAC2 are adjusted to control the gain of the continuous-time sigma-delta modulator, the characteristics of the sigma-delta modulator loop may vary, which leads to degrading circuit stability.
As a result, the continuous-time sigma-delta modulator should include a separate gain control circuit to control the gain of the input signal, thereby increasing power consumption.